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XILINX LPT JTAG Programmer
Photoresist copper clad board etched.
Adapter soldered.
Adapter finished.
Adapter populated.
--TEST PROGRAM
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity m4 is
port(
clk :in STD_LOGIC;
count:out STD_LOGIC_VECTOR(1 downto 0)
);
end m4;
architecture Behavioral of m4 is
begin
cnt:PROCESS(clk)
variable temp : integer range 0 to 4;
BEGIN
if(clk'EVENT and clk='1')then
temp:=temp+1;
if(temp=4)then
temp:=0;
end if;
end if;
count<= conv_std_logic_vector(temp,2);
END PROCESS cnt;
end Behavioral;
